[TMP-053] Feasibility analysis of hardware acceleration for AML

Contact person: Fernando Martin Maroto, (Algebraic AI) (martin.maroto@algebraic.ai) 

Internal Partners:

1. Algebraic, Fernando Martin
2. Christian Weis (Technische Universität Kaiserslautern)  

Algebraic Machine Learning (AML) offers new opportunities in terms of transparency and control. However, that comes along with many challenges regarding software and hardware implementations. To understand the hardware needs of this new method it is essential to analyze the algorithm and its computational complexity. With this understanding, the final goal of this microproject is to investigate the feasibility of various hardware options particularly in-memory processing hardware acceleration for AML.

Results Summary

Sparse Crossing is a machine learning algorithm based on algebraic semantic embeddings. The goal of the collaboration is to first understand the needs and computational complexity of Sparse Crossing and then perform a feasibility analysis of various hardware options for an efficient implementation of the algorithm. Particularly, in-memory processing hardware acceleration and FPGA-based implementations have been considered. A report, and a FPGA based prototype has been developed (currently under patent).